| AVS 54th International Symposium | |
| Electronic Materials and Processing | Thursday Sessions |
| Session EM-ThP |
| Session: | Electronic Materials and Processing Poster Session |
| Presenter: | P.B. Shah, US Army Research Laboratory |
| Authors: | P.B. Shah, US Army Research Laboratory B. Huebschman, US Army Research Laboratory E. Viveiros, US Army Research Laboratory K. Kingkeo, US Army Research Laboratory A. Hung, US Army Research Laboratory K.A. Jones, US Army Research Laboratory |
| Correspondent: | Click to Email |
Communication and radar applications place strong requirements for linearity, efficiency, gain and power handling capability on high power, high frequency AlGaN/GaN HEMT performance. In AlGaN/GaN HEMTs, the surface, interface and bulk traps have been identified as the cause of nanosecond and microsecond range drain-source current transients present during device turn-on and turn-off. These transients drain power from the source, degrade transmitted information, and affect system operating life. Therefore, it is important to understand the causes of these transients and to reduce their effects, through modeling, and characterization. We focus on physics based and emperical spice models because, once developed, these models will allow design and optimization of MMICs taking into account the transients. Both, unpassivated and AlGaN HEMTs passivated with Si3N4, and SiO2 are considered. The surface traps act as virtual gates, and to model them we are paralleling HEMT and FET models available in Agilent’s ADS software with passive elements subcircuits. Adjusting the modulating pulse duty cycle, and gate and drain voltage biases have provided high-power / high-temperature operation data. Results indicate that although Si3N4 mitigates drain lag effects at low power levels , the transients still appear at higher operation power levels. Also, the transients are not as clearly related to pre- and post-kink regions on the I-V characteristics. The drain lag ratio (off state drain current overshoot value / drain current steady state value) increases with device heating due to large ID and large VDS (20V.) Furthermore, the slope of the drain current decay is also influenced by the gate bias present after the drain bias has returned to zero. Gate lag measurements on a number of AlGaN/GaN HEMTs indicate that the turn-on transient is much shorter (~35 ns) than the turn-off transient (~70 ns) and the drain-current waveform when the HEMT is switched on will have different profiles -- in some cases concave and other cases convex. Furthermore, only in some devices as the time interval with low gate bias (VGS = 0) increases, the drain current in the device’s on-state increases, even if most of the turn-on pulse at the gate is applied while VDS = 0, due to carrier heating. With accurate modeling to match the DC I-V, gate lag and drain lag transients, and S-parameter device data, models were verified and used to reverse engineer the AlGaN/GaN HEMT.