AVS 54th International Symposium
    Electronic Materials and Processing Thursday Sessions
       Session EM-ThP

Paper EM-ThP19
Fabrication and Characterization of Pentacene Thin Film Transistor with a Polymer Insulator As Gate Dielectric

Thursday, October 18, 2007, 5:30 pm, Room 4C

Session: Electronic Materials and Processing Poster Session
Presenter: C. Lee, Sungkyunkwan University, Korea
Authors: C. Lee, Sungkyunkwan University, Korea
K. Seo, Sungkyunkwan University, Korea
J. Ko, Sungkyunkwan University, Korea
J. Lee, Sungkyunkwan University, Korea
I. Chung, Sungkyunkwan University, Korea
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Interfacial properties between semiconductor and insulator are critical to determine the performances of organic thin film transistors (OTFTs). In this study, we have fabricated OTFT with a back gate structure on the patterned pentacene active region. We studied the variation of electrical properties in terms of polyvinyl cinnamate (PVCN) which was used as a gate dielectric with different mole concentrations (6%, 7%, 8%). We investigated the leakage current behavior by obtaining topology and its current image simultaneously using scanning probe microscope (SPM). Also, we extracted the electrical properties such as mobility, threshold voltage VT and On/Off ratio from IDS-VDS, IDS-VGS characteristics of OTFTs.