Invited Speakers

  • Ofer Adan, AMAT, “Extending Electron Beam Technology Further/Deeper into the Metrology Space for 7nm or Below Process Development and Manufacturing” 
  • Vladimir Aksyuk, National Institute of Standards and Technology, “Scanning Probe Technology to Make Local, Non-Contact Measurements of Photonic Circuits”
  • Andy Antonelli, Nanometrics, “Optical Critical Dimension Metrology in Memory and Logic”
  • Ravikiran Attota, NIST, “Nondestructive and Economical Dimensional Metrology of Deep Structures”
  • Peter De Wolf, Bruker, “Current Status and Future Prospects for SPM for Supporting the Semiconductor Industry”
  • Anne Delobbe, Tescan Orsay, “When Ion or Electron Channeling meets Crystal Orientation Mapping”
  • Arie den Boef, ASML, “Holistic Approaches for Improved Device Overlay and Edge Placement Error”
  • Alexis Franquet, Imec, “Hybrid SIMS: How The Orbitrap Mass Analyzer Can Improve The Self-Focusing SIMS Concept For Advanced Semiconductor Structures”
  • M. Zahid Hasan, Princeton, “Metrology for Topological Spintronics Materials and Devices”
  • G. Dan Hutcheson, VLSI Research, Inc., “12-2, Moore’s Law in a Neuromorphic World”
  • Sergei Kalinin, Oakridge, “Deep Learning in Atomically Resolved Imaging: from Learning Physics to Atom by Atom Fabrication”
  • David Larson, AMETEK, “Atom Probe Tomography: Toward Improved Productivity and Correlative Analysis in the Semiconductor Industry”
  • Philippe Leray, Imec, “Machine Learning and Deep Learning Opportunities for Metrology and Process Control”
  • George Orji, National Institute of Standards and Technology, “Metrology Requirements for Next Generation of Semiconductor Devices”
  • Yuji Otsuka, Toray Research Center, “Three-Dimensional Structural and Compositional Analysis of MTJ by STEM/EDX Tomography”
  • Sung Park, Molecular Vista, “PiFM Nanoscale Chemical Probe for Novel Patterning Applications”
  • Oliver Patterson, HMI, “Advancement on Massive Parallel Electron Beam Inspection Technology for 7nm or Below Process Development and Manufacturing”
  • Brennan Peterson, KMLabs, “Current Status and Future Possibilities of HHG Sources for Characterization/Metrology in the Semiconductor Industry”
  • Gurtej Sandhu, Micron, “Frontiers in Memory Technology and Metrology Drivers”
  • Christian Schmidt, NVIDIA, “Existing and Future Characterization Needs”
  • John Sturtevant, Mentor, “Interlayer Edge Placement Hotspots: Quantifying and Expanding Combined CD/Overlay Process Window”
  • Valeriy Sukharev, Mentor Graphics, “Electromigration Power Grid Checking – Novel Design and Reliability Metrology”
  • Rudolf Tromp, IBM, “Low Energy Electron Resist Exposures”
  • Alok Vaid, Global Foundries, CD, “Critical Dimension, Thickness, and Emerging Metrology Solutions for Three Dimensional Transistors and Multi-step Patterning”
  • Wilfried Vandervorst, Imec, “Accurate and Precise Analysis of Nanoscale Semiconductor Devices with Atmosphere Tomography: A Physicist’s Dream or an Analyst’s Nightmare”
  • Paul van der Heide, Imec, “What Does Near-line TEM Bring to the Table for the CMOS Manufacturing Industry”
  • Carl Williams, National Institute of Standards and Technology, “Impact of Quantum Information Science on the Future of Nanoelectronics”
  • Shay Wolfling, Nova, “AI and Machine Learning for Advanced Semiconductor Metrology and Process Control”
  • Daniel Worledge, IBM, “Metrology for the Manufacturing Needs of MRAM”
  • Yalin Xiong, KLA Tencor, “Advancement on Optical Inspection Technology for 7nm or Below Process Development and Manufacturing”
  • Ian Young, Intel, “Beyond CMOS Computing: Prospects and Best Bets”
  • Wenbing Yun, Sigray, “Micro X-ray Fluorescence for Integrated Dopants and Thin Film Analysis”
  • Ying Zhou, Intel Corporation, “Integrated Process Learnings with Hybrid Characterization”
  • Ehrenfried Zschech, Fraunhofer IKTS Dresden, “Really Nondestructive High-resolution X-ray Tomography for Advanced Packaging Applications”



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