Paper MS-ThP9
Development of a Fabrication Process for Integrated inductors on Flexible Substrate

Thursday, October 24, 2019, 6:30 pm, Room Union Station B

This paper presents the development of a fabrication process for integrated inductors on flexible substrate. The process consists of two metal and one dielectric layer on a polyimide flexible substrate. Kapton was the choice for the substrate due to its attractive characteristics such as high dimensional stability and thermal and electrical insulation. The first metal layer was 0.5 μm thick gold deposited by electroplating on a nickel film. Nickel was deposited by sputtering and used both as a seed for the electroplating deposition process and to improve the adhesion of gold to the substrate. Gold lines were patterned by lift-off and serve as mask for nickel wet etching. The second metal layer was made through the same process, with thickness of 1 μm. Silicon dioxide was selected as dielectric, also patterned by lift-off and preceded by a chrome e-beam deposition step to enhance adhesion. Structures were formed by conventional photolithography process, with minimum line and space dimensions of 10 μm. With the use of intermediate layers of nickel there was no need for substrate modification to improve metal layers adhesion. The first metal layer thickness was optimized to improve dielectric step coverage, and the second layer was made thicker to reduce series resistance and provide better performance in both quality factor and frequency response. With this technology, it was possible to fabricate integrated inductors with 1 to 5 nH, maximum quality factor of 8, and self-resonant frequency in excess of 20 GHz, with values compatible with those from simulation with Keysight ADS, allowing for the implementation of VCOs and others RF circuits for hybrid flexible electronic structures.