AVS 66th International Symposium & Exhibition
    2D Materials Wednesday Sessions
       Session 2D+EM+MN+NS-WeA

Paper 2D+EM+MN+NS-WeA12
Negative Fermi-level Pinning Effect Induced by Graphene Interlayer in Metal/Graphene/Semiconductor Junction

Wednesday, October 23, 2019, 6:00 pm, Room A216

Session: 2D Device Physics and Applications
Presenter: Kibog Park, Ulsan National Institute of Science and Technology (UNIST), Republic of Korea
Authors: H.H. Yoon, Ulsan National Institute of Science and Technology (UNIST), Republic of Korea
W. Song, Ulsan National Institute of Science and Technology (UNIST), Republic of Korea
S. Jung, SK Hynix, Republic of Korea
J. Kim, Ulsan National Institute of Science and Technology (UNIST)
K. Mo, Ulsan National Institute of Science and Technology (UNIST), Republic of Korea
G. Choi, Ulsan National Institute of Science and Technology (UNIST), Republic of Korea
H.Y. Jeong, Ulsan National Institute of Science and Technology (UNIST), Republic of Korea
J.H. Lee, Ulsan National Institute of Science and Technology (UNIST), Republic of Korea
K. Park, Ulsan National Institute of Science and Technology (UNIST), Republic of Korea
Correspondent: Click to Email
We report the direct observation revealing that the electric dipole layer originating from the off-centric distribution of interacting electrons at metal/graphene interface can induce the negative Fermi-level pinning effect in metal/graphene/semiconductor junction made on a semiconductor substrate containing regions with low interface-trap density. The graphene interlayer takes a role of diffusion barrier preventing the atomic intermixing at interface and preserving the low interface-trap density region. The change of electrostatic potential across the metal/graphene interface due to the interaction dipole layer and the doping of graphene is found to cause the negative Fermi-level pinning effect, supported by the Schottky barrier decreasing as metal work-function increasing. In case of metal/graphene/GaAs junction, the local small patches with very thin or no native oxide layer are considered to be responsible for the negative Fermi-level pinning. In the prevailing region with normal native oxides surrounding the small patches, the Fermi-level pinning appears to be strong. Meanwhile, the negative Fermi-level pinning is found to occur globally in metal/graphene/SiC junction where the SiC substrate is known to produce a low density of interface traps. This work provides an experimental method to form Schottky and Ohmic-like contacts simultaneously on a semiconductor substrate covered partially with graphene by using identical metal electrodes.