Invited Paper RM+EM+NS-TuA7
Memristor Neural Networks for Brain-Inspired Computing

Tuesday, October 23, 2018, 4:20 pm, Room 203A

As CMOS scaling approaches its limits, it becomes more difficult to keep improving the speed-energy efficiency of traditional digital processors. To address this issue, computing systems augmented with emerging devices particularly memristors, offer an attractive solution. Memristors use conductance to represent analog or digital information. The dynamic nature of memristor with both long-term and short-term memories, together with its small effective size contributes to the energy efficiency in weight updating (training). The in-memory computing scheme in a crossbar breaks the ‘von Neumann bottleneck’ as the weights are stored locally in each device during computing. The read out (inference) is finished in one clock cycle regardless of the array size, offering massive parallelism and hence high throughput. The capability of using physical laws for computing in a crossbar enables direct interfacing with analog signals from sensors without energy- hungry analog/digital conversions.

We developed a Ta/hafnium oxide memristor with stable multilevel resistance, linear current voltage characteristics in chosen conductance ranges, in addition to high endurance and long retention. We further integrated the memristors with foundry-made transistors into large arrays. We demonstrated that the reconfigurable memristor networks are capable of analog vector matrix multiplication, and successfully implemented a number of important applications including signal processing, image compression and convolutional filtering. We also built a multilayer memristor neural network, with which we demonstrated in-situ and self-adaptive learning capability with the MNIST handwritten digit dataset. The successful demonstration of analog computing and in-situ online training suggests that the memristor neural network is a promising hardware technology for future computing.