AVS 64th International Symposium & Exhibition
    Plasma Science and Technology Division Wednesday Sessions
       Session PS-WeM

Invited Paper PS-WeM3
Evolution of Dielectric Etchers

Wednesday, November 1, 2017, 8:40 am, Room 23

Session: Advanced BEOL/Interconnect Etching
Presenter: Hiromasa Mochiki, Tokyo Electron Miyagi Limited, Japan
Correspondent: Click to Email

Plasma etchers have met stringent requirements of selectivity, profile, loading and uniformity to make shrinking of device dimensions possible. To that end, plasma etchers evolved from single frequency capacitively coupled plasma (CCP) to multiple frequency CCP, high density plasma (ICP, Microwave) and remote plasma sources. CCPs have been employed in dielectric etches due to it’s ability to achieve high ion energies and low dissociation rate. Single frequency CCP evolved to CCP with magnetic enhancement and decoupled CCPs with high frequency on the top electrode or on the wafer. These knobs provided independent control plasma density and ion energy. Innovation in RF engineering enabled RF power to be split in different segments of electrodes to provide uniformity control and to eliminate standing wave effects. Recently, Direct Current Superposition (DCS) has been added to CCPs to alleviate differential charging, control C/F ratio in fluorocarbon plasmas and curing of resists. In addition to etching dielectric SiO2 and low-k materials, CCPs are employed in etching hard-mask etching process. For 7nm and beyond technology, the shrinking of critical dimensions (CD) without iso-dense loading is required. To meet this requirement, in-situ ALD + Etch is used. With Fusion of Etch and ALD, CD shrink with atomic precision for various patterns, without causing CD loading is achieved. In addition, uniformly control of the CD shrinkage amount across the wafer and Line Edge Roughness Improvement are demonstrated by ALD + Etch process. Process results will be presented to elucidate etch hardware evolution.