AVS 63rd International Symposium & Exhibition | |
Thin Film | Thursday Sessions |
Session TF-ThA |
Session: | Self-assembled Monolayers and Organic/Inorganic Interface Engineering |
Presenter: | M. Argoud, CEA-LETI, MINATEC, France |
Authors: | R. Tiron, CEA-LETI, MINATEC, France A. Gharbi, CEA-LETI, MINATEC, France M. Argoud, CEA-LETI, MINATEC, France F. Delachat, CEA-LETI, MINATEC, France P. Pimenta Barros, CEA-LETI, MINATEC, France X. Chevalier, ARKEMA FRANCE S. Bouanani, STMicroelectronics, France G. Claveau, CEA-LETI, MINATEC C. Lapeyre, CEA-LETI, MINATEC G. Chamiot-Maitrala, CEA-LETI, France C. Monget, STMicroelectronics, France V. Farys, STMicroelectronics, France C. Nicolet, ARKEMA FRANCE C. Navarro, ARKEMA FRANCE |
Correspondent: | Click to Email |
In this paper, we investigate the potential of DSA to address both contact via level patterning as well as line and space application. Using the 300mm pilot line available in LETI and Arkema materials, our approach is based on the graphoepitaxy of PS-b-PMMA block copolymers. Our integration scheme is based on BCP self-assembly inside organic hard mask guiding patterns obtained using 193i nm lithography. The process is monitored at different steps: the generation of guiding patterns, the directed self-assembly of block copolymers and PMMA removal, and finally the transfer of PS patterns into the metallic under layer by plasma etching.
Furthermore, several process flows are investigated, either by tuning different material related parameters such as the block copolymer intrinsic period or the interaction with the guiding pattern surface (sidewall and bottom-side affinity). The final lithographic performances are finely optimized as a function of the self-assembly process parameters such as the film thickness and bake (temperature and time).
Finally, DSA performances as a function of guiding patterns density are investigated. Thus, for the best integration approach, defect-free isolated and dense patterns for both contact shrink and multiplication (doubling and more) have been achieved on the same processed wafer.
These results show that contact hole shrink and multiplication approach using DSA is well compatible with the conventional integration used for CMOS technology.