AVS 63rd International Symposium & Exhibition
    2D Materials Focus Topic Friday Sessions
       Session 2D+NS-FrM

Paper 2D+NS-FrM10
Atomic Layer Deposition of High-k Dielectrics on WSe2 for High Performance Electronic Devices

Friday, November 11, 2016, 11:20 am, Room 103B

Session: 2D Materials: Device Physics and Applications
Presenter: Pushpa Raj Pudasaini, The University of Tennessee Knoxville
Authors: P.R. Pudasaini, The University of Tennessee Knoxville
M.G. Stanford, The University of Tennessee Knoxville
A. Hoffman, The University of Tennessee Knoxville
T.Z. Ward, Oak Ridge National Laboratory
D.G. Mandrus, The University of Tennessee Knoxville
P.D. Rack, The University of Tennessee Knoxville
Correspondent: Click to Email
The performance of electronic and optoelectronic devices based on two-dimensional (2D) transition metal dichalcogenides (TMDs), such as tungsten diselenide (WSe2) is significantly affected by the quality of the various interfaces present in the device. Historically, the performance of bottom-gate SiO2 2D TMDs field effect transistor (FET) devices has been greatly limited by the carrier scattering due to the oxide trapped charges, surface roughness, and surface optical phonons, among others. One approach to mitigate this issue is to explore alternatives to SiO2 which ideally would involve high-κ dielectrics, in which Coulombic impurity scattering is confirmed to be strongly shielded by the dielectric screening. However, depositing high quality high-k dielectric film onto the surfaces of TMDs is very challenging due to the chemical inertness of the TMD basal planes. Here, we present an aluminum oxide and hafnium oxide top-gate on WSe2, deposited using atomic layer deposition (ALD) both with and without hydrogen/oxygen plasma treatments and titanium seed layers. The top gated WSe2 FET devices are fabricated by employing ALD deposited high k-dielectrics, with promising device characteristics having large current on-off ratio (~108), small threshold voltage (~5V) and relatively large field effect mobility (~70 cm2/V.s) at room temperature. A high performance logic invertor device is also demonstrated.