Paper TF+AS+NS+SA-ThM11
Ni_1-xPt_xSi Film Characterization for sub-32 nm CMOS Fabrication

Thursday, October 22, 2015, 11:20 am, Room 111

Aggressive scaling of CMOS devices demands silicide engineering for high performance in the sub-32nm technology node and beyond. Ni-silicide can satisfy many of the integration challenges but it is limited by morphological stability at elevated temperatures. On the other hand, incorporating Pt into Ni-silicide forms a more robust nickel platinum silicide (Ni_1-xPt_xSi) and improves morphological stability. Advantages of Pt incorporation include extension of the temperature range over which the NiSi exists, delay in the agglomeration of NiSi phase, suppression of the high resistive NiSi₂ phase formation and retardation of the Ni diffusion at the interface and grain boundaries which could lead to encroachment or piping. This work discusses three important aspects of Ni_1-xPt_xSi formation: (1) understanding NiPt diffusion with two step RTA anneals – formation (RTA1) and transition (RTA2), which is very important for thickness uniformity across structures with varying CDs, encroachment control, device performance and yield; (2) understanding NiSi phase formation for thermal stability, and (3) understanding Pt distribution in the final film with low RTA1 temperatures. For this study Ni_1-xPt_xSi samples were fabricated from a simple n-Si/Ni_0.85Pt_0.15/TiN stacks, annealed at range of RTA1 temperatures from RTA-20°C to RTA+30°C for 20s followed by a standard RTA2 anneal for 30s. Characterization of final Ni_1-xPt_xSi films obtained at different RTAs based on XRD phase identification and XPS analysis will be presented. Pt distribution in the final silicide films will be discussed.