AVS 61st International Symposium & Exhibition | |
Electronic Materials and Processing | Wednesday Sessions |
Session EM1-WeM |
Session: | Materials and Devices for High Power Electronics (8:20-11:00 am)/Two Dimensional Electronic Materials & Devices (11:00 am - 12:20 pm) |
Presenter: | Rachael Myers-Ward, Naval Research Laboratory |
Authors: | R.L. Myers-Ward, Naval Research Laboratory Z.R. Robinson, Naval Research Laboratory V.D. Wheeler, Naval Research Laboratory P.B. Klein, Naval Research Laboratory N.A. Mahadik, Naval Research Laboratory R.E. Stahlbush, Naval Research Laboratory C.R. Eddy, Jr., Naval Research Laboratory D.K. Gaskill, Naval Research Laboratory |
Correspondent: | Click to Email |
Silicon carbide is a material of interest for high-voltage, high-power switching device applications. Basal plane dislocations (BPDs) are a major concern for SiC bipolar devices as they source Shockley-type stacking faults in the presence of an electron-hole plasma and reduce minority carrier lifetimes [1]. Many researchers have investigated methods to reduce BPD densities by experimenting with pre-growth treatments [2-4], substrate orientation [5], growth parameters [5, 6] and growth interrupts [7]. This work investigates extended defects, morphology and lifetime in 4H-SiC epilayers grown on substrates offcut 2° toward the [11-20].
Epilayers were grown in a horizontal hot-wall reactor using silane (2% in H2) and propane. Hydrogen etching was conducted to determine the morphology of the substrate during the ramp to growth temperature; temperatures explored were 1400, 1450 and 1500 °C. Epilayers were grown at various growth rates of 1, 5 and 10 µm/hr and C/Si ratios from 1.0 to 1.55. The influence of doping with ultra-high purity nitrogen was investigated. Ultraviolet photoluminescence (UVPL) imaging was used to identify BPDs in low doped epilayers. Time resolved photoluminescence measurements were performed to determine the minority carrier lifetime of the layers and Raman spectroscopy was used to analyze polytype inclusions. Surface roughness was measured by atomic force microscopy and Nomarski microscopy was also used to characterize morphology.
No step bunching was found when the temperature was raised to 1400 °C in H2 and cooled down immediately. However, intermittent step bunching formed when the temperature was raised to 1500 °C. When a 15 µm epilayer was introduced, step bunching was observed and the surface roughness was 6.0 nm RMS. For comparison, a standard 4° offcut sample typically has 3.0 nm RMS for a 20 µm epilayer. Using UVPL, it was found that after 4 µm of epi, 90% of the BPDs had converted in the epilayer as compared to 70% in a 4° offcut sample, indicating the conversion is faster in the lower offcut material. Epilayers without any BPDs were observed; however, 3C-SiC inclusions were present as verified by Raman spectroscopy. BPD densities and carrier lifetimes of the epilayers will also be reported.
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