| AVS 61st International Symposium & Exhibition | |
| Electronic Materials and Processing | Tuesday Sessions |
| Session EM-TuM |
| Session: | Advanced Interconnects and Materials |
| Presenter: | Daniel Edelstein, IBM |
| Correspondent: | Click to Email |
We are familiar with microelectronics "scaling" (reducing dimensions) of integrated circuits, so they get denser and cheaper ( Moore ’s Law), and faster (Dennard’s Law), in turn increasing the computational power of IC chips. Perhaps less appreciated is that scaling has always gone against the performance and reliability of the multilevel on-chip wiring, commonly termed "Back End of the (Manufacturing) Line", or BEOL, needed to connect these circuits. This invited talk focuses on forefront efforts in materials and nano-scale engineering to combat BEOL scaling and extendibility problems.
Our work has begun on the 7 nm CMOS node, with our 11th generation Cu BEOL. The smallest wires are ~17 nm wide, (< 1/10th the lithographic wavelength!), and represent ~1/25x scaling from the 1st Cu generation. As we migrate to these dimensions, significant innovations in patterning and metallization have been required to preserve defect-free fabrication and electromigration reliability. In order to reduce parasitic wiring capacitance, with its signal delay and power loading, our insulator dielectric constants have migrated from 4.1 to 2.4. But in turn, these materials get more fragile, both electrically and mechanically, requiring significant learning in interface and material mechanics, plus dielectric reliability physics.
Concurrently, system-level performance and cost scaling push more diverse functions onto the chip, and into the wiring levels. Recent innovations add new devices to the finer wiring levels, as well as “reverse-scaled” (larger) wiring levels allow us to collapse more diverse packaging functions onto the chip. Examples of what we fabricate will be presented, with some of their integration-specific issues and solutions. These include ultrathick Cu for data bandwidths, high-Q and magnetic inductors for RF and voltage converters, MEMs switches for antenna diversity, through-Si vias for 3D integration, and magnetic and phase-change non-volatile memory devices (MRAM and PCM).