Paper 2D-ThP20
An Efficient Dry-Transfer Technique with Thermal Annealing for Enabling High-Performance Multilayer MoS₂ Transistors

Thursday, November 13, 2014, 6:00 pm, Room Hall D

We report the first dry-transferred pristine molybdenum disulfide (MoS₂) field-effect transistors (FETs) fabricated without any post-transfer lithographical and chemical processes, by using a facile, completely-dry-transfer technique with high throughput and high alignment precision. We show that the device performance can be greatly boosted by thermal annealing.

MoS₂ FETs have shown significant potential for enabling 2D electronic devices [1], by demonstrating increasingly competitive performance including high mobility, contact quality, and excellent On/Off ratios. All the MoS₂ FETs reported to date, however, are fabricated using electron-beam- or photo-lithography on top of MoS₂ flakes, and/or polymer-assisted transfer of MoS₂ sheets followed by dissolving the polymer [2], both of which involve multiple wet processing steps. Such processes may contaminate or even degrade the MoS₂ surface, and adversely affect device performance[3].

Here, we demonstrate multilayer MoS₂ FETs fabricated by using a completely-dry transfer method, which not only obviates the undesirable wet chemistry steps, but also has high device yield and more scalable device geometry. Using the technique, we fabricate the electrodes at wafer scale, aligning each flake to the electrodes during the transfer, which significantly improves the efficiency and yield, achieving nearly 100% success rate in obtaining pristine MoS₂ FETs. This dry-transfer process is readily applicable to substrates with much thinner high-k dielectric layers to attain low-threshold-voltage, low-power operations. Also, the performance of as-transferred devices can be further improved through vacuum annealing treatments. While experiments suggest that annealing may lead to dissolving of graphene into metal and thus improve contact [4], annealing effect on MoS₂ devices remains to be systematically explored. We find that the devices’ performance typically exhibit noticeable improvement after initial annealing, and further enhancement can often be achieved via additional annealing. With annealing treatments at increasing temperatures, reliable reduction in device resistance is observed, together with consistent increase in mobility up to µ=76cm²/(V∙s), improvement in On/Off ratio exceeding 10⁷, and enhancement in transconductance. Furthermore, while sometimes annealing can even convert non-Ohmic contacts into Ohmic, occasionally such conversion may not be completed, but still clear improvement can be observed.

[1] B. Radisavljevic, et al., Nat. Nanotechnol. 6, 147 (2011).

[2] D. Dumcenco, et al., arXiv:1405.0129 (2014).

[3] Z. Cheng, et al., Nano Lett. 11, 767 (2011).

[4] W. S. Leong, et al., Nano Lett. 14, 3840 (2014).