Spin transfer torque magnetic random access memory (STT-MRAM) is a new and promising memory technology that features fast read and write times, small cell sizes of < 6F2, nonvolatility, radiation hardness and low power consumption.

 

In this work, we will go over the fundamental physics of magnetoresistance and spin transfer torque effects – key scientific phenomena required for STT-MRAM memory operation. The precursor technology – conventional MRAM – is now successfully used in commercial applications; however it cannot be scaled down to compete with DRAM or Flash technologies. We will go over the Write-Store-Read (WSR) trilemma, which is the challenge to achieve fast and reliable writing, reading and storing information at the same time in STT-MRAM. For a successful product, the desired probability of a switching error at the current deliverable by the transistor should be less than 10-3 for storage-class memory and 10-9-10-18 for working-class memory. Depending on the switching time, two regimes of switching, thermal and precessional, can be identified, and the switching error can dramatically depend not only on the switching regime but also on the switching time within the regime. For the reading process, one critical parameter is read disturb – probability of inadvertent switching of the element during reading operation. For memory applications, this probability has to be smaller than ~10-20 (with some dependence on particular design and array size). For storing the recorded information, the thermal stability parameter, defined as the ratio of energy barrier to kBT is important and typically has to be larger than 60-80 depending on specific application.

 

STT-MRAM can be implemented in two major realizations: in-plane and perpendicular. For each of them, single and dual MgO designs can be implemented, with the dual MgO design having up to 50% reduction of the switching current and providing much better switching symmetry than a single one. Special attention will be paid to our recent developments to of in-plane Dual MTJ design. By building special structure with modified reference layers, we were able to extract contributions from each barrier. Even though STT switching current is reduced in Dual design, the quality of the two barriers in currently built structures is deteriorated as compared to single MTJ. Respectively further improvement from Dual designs is expected if the quality of the two barriers is improved.