| AVS 59th Annual International Symposium and Exhibition | |
| Graphene and Related Materials Focus Topic | Friday Sessions |
| Session GR+EM+ET+MS+NS-FrM |
| Session: | Graphene Device Physics and Applications |
| Presenter: | J. Baltazar, Georgia Institute of Technology |
| Authors: | J. Baltazar, Georgia Institute of Technology H. Sojoudi, Georgia Institute of Technology J. Kowalik, Georgia Institute of Technology L. Tolbert, Georgia Institute of Technology S. Graham, Georgia Institute of Technology C.L. Henderson, Georgia Institute of Technology |
| Correspondent: | Click to Email |
In this study we investigate the use of a self-assembled monolayer (SAM) to create a p-n junction in graphene films. Previous techniques rely on charge transfer from adsorbants or electrostatic gate/potentials. Here we demonstrate that, by successfully modifying the SiO2 surface with an aminopropyltriethoxysilane (APTES) layer, and using intrinsically p-doped transferred CVD graphene films, a well-defined junction can be achieved. Field-effect transistors and p-n junction regions are fabricated prior to graphene film transfer, in order to preserve the pristine properties of the graphene. The I-V characteristic curve indicates the presence of two thermally-controllable neutrality points. This method allows a facile, controllable and low temperature fabrication of graphene p-n junctions.