AVS 59th Annual International Symposium and Exhibition
    Electron Transport at the Nanoscale Focus Topic Thursday Sessions
       Session ET+NS+EM-ThM

Paper ET+NS+EM-ThM5
Single Charge Nano Memory using Nano Carbon Material

Thursday, November 1, 2012, 9:20 am, Room 16

Session: Electron Transport at the Nanoscale: Nanowires and Junctions
Presenter: K. Matsumoto, Osaka University, Japan
Authors: K. Matsumoto, Osaka University, Japan
T. Kamimura, Osaka University, Japan
Correspondent: Click to Email

Single charges nano memory which can shift the threshold voltage by the stored single charge and operated at room temperature was realized using the carbon nanotube as an ultra short channel of 10nm.
The double gate stack insulator layers of Al2O3(3nm) and SiNx (27nm) are deposited using the atomic layer deposition to the suspended carbon nanotube with source and drain electrodes of 70nm separation. The carbon nanotube channel was then surrounded by this double gate stack insulator layers and the gap between the source drain electrodes with the insulator layrers reduced down to as small as10nm. The gate metal was then deposited through this gap to form the gate electrode of 10nm.
The dependence of the drain current on the top gate bias shows weak oscillation along the gate bias with the period of 220mV. The oscillation is attributed to the single charge injection from CNT channel to the Al2O3/ SiNx interface trap, which make the threshold voltage shift of 220mV. The injection of charge is regulated by the Coulomb blockade that stops the next charge to be injected to the trap. The around trip of the gate bias produces the hysteresis. The width of the hysteresis was also regulated by the single charge injection and shows the stepwise increase.
Thus, we have succeeded in fabricating the single charge memory operated at room temperature.