| AVS 59th Annual International Symposium and Exhibition | |
| Electronic Materials and Processing | Monday Sessions |
| Session EM+TF+OX+GR-MoM |
| Session: | High-k Dielectrics for MOSFETs I |
| Presenter: | S. Oktyabrsky, University at Albany-SUNY |
| Authors: | S. Oktyabrsky, University at Albany-SUNY A. Greene, University at Albany-SUNY S. Madisetti, University at Albany-SUNY P. Nagaiah, University at Albany-SUNY M. Yakimov, University at Albany-SUNY R. Moore, University at Albany-SUNY S. Novak, University at Albany-SUNY H. Bakhru, University at Albany-SUNY V. Tokranov, University at Albany-SUNY |
| Correspondent: | Click to Email |
Development of p-type MOSFETs using new materials is an important goal to provide a further scaling of CMOS circuits. Although Ge is still considered as a main candidate for novel p-channels due to its superior bulk transport properties, recent progress in strained III-Sb channels and MOS technologies makes it a good competitor in particular for deeply scaled devices. The materials parameters affecting MOSFET’s figures-of-merit are reviewed with the emphasis on strain in quantum wells (QWs), effective mass, density of states and mobility.
Progress in development of materials for III-Sb channels is reported. Optimization of MBE growth of metamorphic buffers and GaSb on lattice-mismatched GaAs substrates has resulted in “step-flow” growth mode of GaSb with monolayer-high steps on the surface, ~107cm-2 dislocation density and bulk hole mobility 860cm2/Vs. Optimization of strain in QWs provided the highest Hall mobility of 1020 cm2/Vs at sheet hole density of 1.3x1012/cm2 obtained for In0.36Ga0.64Sb with compressive strain of 1.8%. Hole mobility in QW channel was benchmarked against the thickness of top semiconductor AlGaSb barrier. The effect of interface-related scattering hole mobility in the channel was found to be significantly less than e.g. for n-InGaAs, that might be due to stronger localization of holes in QWs.
Two approaches to fabricate high-quality III-Sb/high-k interface were studied: all in-situ Al2O3 or HfO2 gate oxides, and ex-situ atomic layer deposited (ALD) Al2O3 with InAs top semiconductor capping layer. Interface with in-situ MBE gate oxides was found to improve with in-situ deposited a-Si interface passivation layer (IPL). Interfaces with better thermal stability, reduced interface trap density and hysteresis were observed on both n- and p- type GaSb MOSCaps with the IPL. P-type MOSFETs with HfO2 showed a maximum drain current of 23 mA/mm for a 3μm gate length. Use of a-Si IPL has also resulted in a significant (over an order of magnitude) reduction of the hole density in QWs and corresponding negative flat band voltage shift and drop of mobility which becomes remote Coulomb scattering-limited. An interface with ALD Al2O3 was improved by a thin 2nm interface layer of InAs which was treated with HCl or(NH4)2S immediately prior to ALD process. Optimized annealing further improved the C-V characteristics, reduced interface trap density down to 1012 cm-2eV-1, leakage current and MOSFET subthreshold slope down to 200 mV/dec. Increasing annealing temperature to and above 450oC drastically degraded C-V characteristics due to low thermal budget of antimonides.