AVS 57th International Symposium & Exhibition
    Nanometer-scale Science and Technology Tuesday Sessions
       Session NS-TuM

Paper NS-TuM5
Axial Ge/Si Nanowire Heterostructures: Synthesis and Asymmetric Band-gap Engineered Tunnel FETs

Tuesday, October 19, 2010, 9:20 am, Room La Cienega

Session: Nanomanufacturing and Nanomachines
Presenter: S.A. Dayeh, Los Alamos National Laboratory
Authors: S.A. Dayeh, Los Alamos National Laboratory
J. Huang, Sandia National Laboratories
A. Gin, Sandia National Laboratories
S.T. Picraux, Los Alamos National Laboratory
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While new materials and device concepts are being developed to extend CMOS device scaling beyond the 22 nm node, the potential of combining Si/Ge heterostructured materials with the dimensionality of semiconductor nanowires (NWs) remains to be explored. The vapor-liquid-solid (VLS) mechanism allows modulation of doping and alloy composition in the axial NW direction which is the transport direction for NW FETs. This provides an additional degree of freedom for energy band-edge engineering in the transport direction which is difficult to access in planar devices. Such unique aspect of semiconductor nanowires when added to Ge compatibility for integration with Si technology, makes Ge/Si axial NW heterostructures advantageous over other existing material and device possibilities, in particular for tunnel FETs.

This work reports on two significant advances in the area of heterostructure nanowires and tunnel FETs: (i) the realization of 100 % compositionally modulated Si/Ge axial heterostructure nanowires with lengths suitable for device fabrication and (ii) the design and implementation of Schottky barrier tunnel FETs on these nanowires for high-on currents and suppressed ambipolar behavior. A growth procedure was devised to eliminate Au diffusion on the NW sidewalls and minimize random kinking in the heterostructured NWs as deduced from detailed electron microscopy analysis. Our prototype devices resulted in a current drive in excess of 100 µA/µm (I/πD) and 105 Ion/Ioff ratios over a wide range of source-drain biases, thus exceeding earlier performance results in the literature of tunnel FET devices made of semiconductor nanowires and carbon nanotubes by ~ 2-3 orders of magnitude. These results demonstrate the potential of such asymmetric heterostructures (both in the semiconductor channel and metal-semiconductor barrier heights) for low-power and high performance electronics.