Paper LB-WeA7
Polymer Molded Templates for Nanostructured Vertical Amorphous Silicon Photovoltaics

Wednesday, October 20, 2010, 4:00 pm, Room Cimmaron

Although amorphous silicon photovoltaics is a mature commercial technology, these potentially low cost thin film photovoltaic devices still suffer from either incomplete absorption of the light that excites electrons to higher energy states where they can generate electrical power or the loss of these energetic electrons in the material before they can be collected. This results in a tradeoff between producing a cell thick enough to absorb the incident light but thin enough that excited electrons can be extracted from the silicon before they are lost to recombination through electron traps (that are present at high density in these low cost thin films). To overcome these problems, complicated triple junction cells are fabricated that reduce these problems but increase the costs to rival that of crystalline cells.

We propose to address this trade off by changing the amorphous silicon layers from planar to a vertical 3-D nanostructured geometry that will result in long optical absorption paths and high light absorption even for very thin silicon layers. Choosing the dimensions of the nanostructured vertical geometry carefully will also result in low top surface reflection. The combination of low surface reflection, long optical absorption path length, and reduced electron trapping will yield significantly higher thin film device quantum efficiencies. The much thinner required layers will also result in higher throughput for expensive Si deposition equipment.

Modeling the increased path length in amorphous Si:H indicates the increase in absorption due to the vertical geometry could be in the range of 30 %. The vertical geometry will introduce several other effects that should increases efficiency over current practice, these effects include improved series resistance, electrical contact geometries, reduced reflection, and stability gains. There are also negative secondary factors that must be considered; these include a larger junction interfacial area resulting in both a larger dark current and a larger doped semiconductor absorption loss. Factoring in these positive and negative effects, we fully expect to demonstrate vertical cells with efficiency gains of at least 15% relative to planar control cells. This would be a very significant gain as amorphous silicon is currently considered a relatively stable, well developed technology.

It is essential that these vertical structures be fabricated at low cost. To fabricate these structures, we formed three dimensional nanoscale vertical patterns in a polymer layer on a glass substrate. This pattern acts as a template during Si device layer deposition to generate the desired vertical device geometry. The nanostructured template has high aspect ratio features down to 300 nm and would add far too much cost if standard nanofabrication patterning and etching processes were used, consequently we have developed templates using a low cost high aspect ratio polymer molding process that allows us to rapidly create these structures. Amorphous silicon PIN layers have been deposited on these templates and we have performed optical transmission and reflection studies on the patterned and unpatterned regions of the samples to determine the effects of templated fabrication on light capture.