AVS 56th International Symposium & Exhibition
    Electronic Materials and Processing Tuesday Sessions
       Session EM-TuP

Paper EM-TuP5
Lifetime and Defect Characterization of Engineered Germanium-on-Silicon Wafers for III-V Photovoltaics

Tuesday, November 10, 2009, 6:00 pm, Room Hall 3

Session: Electronic Materials and Processing Poster Session
Presenter: J. Sheng, University of New Mexico
Authors: J. Sheng, University of New Mexico
D. Leonhardt, University of New Mexico
J.G. Cederberg, Sandia National Laboratories
M.S. Carroll, Sandia National Laboratories
S.M. Han, University of New Mexico
Correspondent: Click to Email
Demand for low-cost, light-weight, mechanically strong, high-efficiency multijunction solar cells has motivated the development and use of high-quality Ge-on-Si (GoS) heterostructures to integrate III-V films. However, such integration poses many engineering challenges, ranging from lattice mismatch, to thermal expansion coefficient mismatch, to non-planar morphological evolution. To eliminate antiphase domain (APD) boundaries in GaAs grown on GoS, in particular, the Ge surface on GoS substrates must maintain the crystallographic off-cut of the underlying Si. Here, we report a slurry-free chemical-mechanical polish step used to planarize the GoS surface. The root mean square (RMS) roughness of the resulting Ge surface is less than 1 nm. We have also characterized polished GoS substrates for their electrical properties. Due to nanoscale heterojunction engineering involving a SiO2 template, the experimentally measured recombination velocity (SRV) at the Ge-Si interface approaches 9 x 103 cm/s. Capacitance-voltage (C-V) measurements are also used to determine the density of electrically active defects in the Ge layer of the GoS heterostructure. The p-type defect density is approximately 2 x 1016 cm-3. Currently, more steps are taken to reduce the density of active defects.