Paper PS-TuP16
Effective Measurements of Plasma Process-Induced Damage Related to Dielectric Integrity Degradation on Gate Oxide using Practical Structure

Tuesday, October 21, 2008, 6:30 pm, Room Hall D

Monitoring techniques are required to understand the root cause of the damage and how to optimize the process or equipment. Many techniques for plasma damage monitor were introduced.^1,2 But it was difficult for them to identify the plasma process-induced damage because of unrealistic and complicated structures. Therefore, the plasma process was optimized and verified with newly-designed test structure to monitor wafers. The presented structure based on an unconventional antenna structure is very simple but effective to measure the plasma charging damage, which correlates to real circuit performance, such as parametric shifts, hot carrier response, and dielectric integrity degradation³. It was composed of various antenna ratios, active areas, and patterned features for detecting electron shading effect, plasma non-uniformity and ion bombardment damage. Electrical tests including threshold voltage shift, hot carrier stress, and breakdown voltage have been performed to detect plasma damage.

¹ An Efficient Method For Plasma-Charging Damage Measurement, K. P. Cheung, IEEE ELECTRON DEVICE LETTERS, 11(1994)460.
² A Test Structure for Plasma Process Charging Monitor in Advanced CMOS Technologies, Sang U. Kim, IEEE, (1997) 57.
³ Plasma damage in thin gate MOS dielectrics and its effect on device characteristics and reliability, Tomasz Bro_zek, Microelectronics Reliability, 40(2000)625