IUVSTA 15th International Vacuum Congress (IVC-15), AVS 48th International Symposium (AVS-48), 11th International Conference on Solid Surfaces (ICSS-11)
    Electronics Thursday Sessions
       Session EL-ThM

Invited Paper EL-ThM1
Fabrication of a Silicon-based Solid State Quantum Computer

Thursday, November 1, 2001, 8:20 am, Room 124

Session: Quantum Electronics
Presenter: M.Y. Simmons, University of New South Wales, Australia
Authors: R.G. Clark, University of New South Wales, Australia
M.Y. Simmons, University of New South Wales, Australia
A.S. Dzurak, University of New South Wales, Australia
A.R. Hamilton, University of New South Wales, Australia
S. Prawer, University of New South Wales, Australia
D.N. Jamieson, University of New South Wales, Australia
G. Milburn, University of New South Wales, Australia
Correspondent: Click to Email
The fabrication of a scalable silicon-based quantum computer, in which the qubits are nuclear spin states of single phosphorus atoms embedded in isotopically pure silicon registered to surface control gates@footnote 1@, is a significant technological challenge. The Australian program is approaching this in two ways. In our ‘bottom up’ program the embedded phosphorus array is fabricated using advanced STM lithography techniques followed by Si MBE overgrowth. In our ‘top down’ strategy, a detailed process has been developed in which single phosphorus atoms are implanted (with on-chip verification) self-aligned to the surface control gates and fast single electron transistor readout devices. The fabrication pathways each have their list of associated problems. An outline will be given of the practical issues that have to be overcome, together with a view on how this might be achieved including progress to date. In our bottom-up program we have recently reported@footnote 2@ that it is possible to fabricate an atomically-precise linear array of single phosphorus bearing molecules on a silicon surface with the required dimensions for the QC. Our recent work has focused on the next step of implementing strategies for incorporating the P atoms substitutionally into the silicon surface with enhanced bonding and without disturbing the P array prior to encapsulation by subsequent silicon overgrowth. Our strategy in the top down program is to concentrate on fabricating the simplest few-qubit test structures that will enable us to access the critical physics. However we have approached this from the viewpoint of developing a reliable, reproduceable process which, for linear phosphorus arrays, can then be readily scaled up to multi-qubit devices. An overview will be given of key details of the top down fabrication scheme and measurements on the first test structures. @FootnoteText@ @footnote 1@ B.E.Kane, Nature 393, 133 (1998) @footnote 2@ J.L. O ’Brien, S.R. Schofield, M.Y. Simmons, R.G. Clark, A.S. Dzurak et al, Phys. Rev. B Rapid Communications (in press): cond-mat/0104569 (2001)