IUVSTA 15th International Vacuum Congress (IVC-15), AVS 48th International Symposium (AVS-48), 11th International Conference on Solid Surfaces (ICSS-11)
    Electronics Monday Sessions
       Session EL-MoM

Paper EL-MoM5
Effects of Bi/Sr Stoichiometric Ratio on Electrical Properties of Pt/SrBi@sub 2@Nb@sub 2@O@sub 9@/Si Ferroelectric Gate Structure

Monday, October 29, 2001, 11:00 am, Room 130

Session: Ferroelectric
Presenter: Y.T. Kim, Korea Institute of Science and Technology
Authors: Y.T. Kim, Korea Institute of Science and Technology
S.I. Kim, Korea Institute of Science and Technology
I.H. Choi, Korea University
H.S. Choi, Korea University
C.W. Lee, Kookmin University, Korea
Correspondent: Click to Email
In comparison with high dielectric constant (k) isotropic ferroelectric materials such as Pb(Zr,Ti)O@sub 3@ (PZT), and PLZT for the storage capacitor, Bi-layered perovskite materials have relatively low k and some advantages such as excellent fatigue resistance, low leakage current. Especially, for MFSFETs, SrBi@sub 2@Nb@sub 2@O@sub 9@ (SBN) seems to be a promising candidate among the Bi-layered perovskite family because it has relatively lower k than SBT.@footnote 1@ It is well known that the lower k, the higher electric field is applied to the ferroelectric thin film.@footnote 2@ The high electric field causes greater memory window, which becomes now an issue for the application of MFSFETs as cell devices in the non destructive readout ferroelectric random access memory (NDRO-FRAM) with low voltage operation. In this work, in order to control the Bi/Sr stoichiometric ratio, we used SrNb@sub 2@O@sub 7@ and Bi@sub 2@O@sub 3@ targets with different powers of rf magnetrons. As a result, we have found that electrical properties are strongly sensitive to the Bi content. The capacitance-voltage (C-V) characteristics and memory windows of Pt/SBN/Si gate were investigated with various Bi/Sr content ratios. The memory window of the Pt/SBN/Si gate with the Bi/Sr ratio of 3.1 becomes 1.8 V at applied voltage of 3 V, which is the greatest memory window so far. However, the memory window gradually increases with increasing the Bi/Sr ratio in the SBN thin films, but when the Bi/Sr ratio becomes over than 3.1 the electrical properties such as memory window and breakdown voltage becomes to be degraded. The SBN thin film with Bi/Sr ratio of 3.1 has the (008) preferred orientation after annealing at 600°C for 1hr in O@sub 2@ ambient, which is relatively lower recrystallization temperature than that of other Bi-layered perovskite family. Particularly, in order to improve the memory window, it has been used to insert buffer insulators such as CeO@sub 2@, Y@sub 2@O@sub 3@, and YMnO@sub 3@,2). However, in this work, we can obtain the greatest memory window without a buffer insulator. @FootnoteText@ @footnote 1@ Y. T. Kim and D. S. Shin, Appl. Phys. Lett. 71, 3507 (1997) @footnote 2@ H. N. Lee, Y. T. Kim and Y. K. Park, Appl. Phys. Lett. 74, 3887 (1999)