AVS 46th International Symposium
    Flat Panel Displays Topical Conference Tuesday Sessions
       Session FP+OE+EM-TuA

Paper FP+OE+EM-TuA3
Photolithographically Defined Pentacene Thin Film Transistors on Flexible Plastic Substrates

Tuesday, October 26, 1999, 2:40 pm, Room 604

Session: Thin Film Transistor Materials and Devices
Presenter: D.J. Gundlach, The Pennsylvania State University
Authors: D.J. Gundlach, The Pennsylvania State University
C.D. Sheraw, The Pennsylvania State University
H. Klauk, The Pennsylvania State University
J.A. Nichols, The Pennsylvania State University
J-R. Huang, The Pennsylvania State University
T.N. Jackson, The Pennsylvania State University
Correspondent: Click to Email
We report photolithographically-defined pentacene thin film transistors (TFTs) on flexible plastic substrates with performance similar to hydrogenated amorphous silicon (a-Si:H) devices. Organic TFTs fabricated on flexible plastic substrates are of interest for mechanically rugged, low-cost broad-area electronic applications. Pentacene TFTs with performance similar to a-Si:H TFTs have been reported,@footnote 1@ however, such devices are typically fabricated on oxidized silicon or glass substrates. Since photolithographic processing of organic semiconducting materials is problematic, such devices, including more recent devices on polymeric substrates,@footnote 2@ typically use source and drain contacts deposited through a shadow-mask after the organic active layer deposition. We have fabricated photolithographically-defined pentacene TFTs on polyethylene naphthalate (PEN) and polyimide (PI) films. For ease of processing, the films were mounted to silicon wafers using a pressure sensitive silicone adhesive and pre-shrunk by heating to 150°C for 1 hour in vacuum. A 30 nm thick Ni gate electrode, 160 nm thick SiO@sub 2@ gate dielectric, and 80 nm thick Pd source/drain contacts were deposited by ion-beam sputter deposition. The TFTs were completed by thermally evaporating pentacene onto substrates heated to 60°C. All deposited layers were photolithographically-defined using a two-layer resist lift-off process. Field-effect mobility larger than 0.3 cm@super 2@/V-s was extracted for TFTs on both PI and PEN film, current on/off ratio was greater than 10@super 5@, and subthreshold slope was less than 1.5 V/decade, all obtained using drain-to-source and gate-to-source biases of -30 volts or less. @FootnoteText@ @footnote 1@ Y-Y. Lin, D. J. Gundlach, S. F. Nelson, and T. N. Jackson, IEEE Electron Device Lett., vol. 18, pp. 606-608, 1997. @footnote 2@ C. D. Dimitrakopoulos, S. Purushothaman, J. Kymissis, A. Callegari, and J. M. Shaw, Science, vol. 283, pp. 822-824, 1999.