AVS 46th International Symposium
    Electronic Materials and Processing Division Wednesday Sessions
       Session EM-WeA

Invited Paper EM-WeA7
Architectonics of Defect-Tolerant Molecular Circuitry

Wednesday, October 27, 1999, 4:00 pm, Room 608

Session: Novel Materials and Devices for Computation and Communication
Presenter: R.S. Williams, Hewlett-Packard Labs
Correspondent: Click to Email
Economic and physics considerations indicate that the exponential scaling of CMOS will saturate in a decade. However, the power efficiency of present electronics technology is at least a billion times smaller than the non-reversible thermodynamic limit.@footnote 1@ Thus, there is a huge incentive to invent new devices with nanometer dimensions. In addition, vast quantities of these devices must be manufactured and interconnected inexpensively. Two lines of complementary research are necessary for future nanoelectronics: the development of quantum-state switches and the design of circuit elements that can be assembled into complex systems via chemical processes. A recent proposal for the construction of molecular-electronic computers involves the explicit incorporation of defect tolerance, which is the capability to operate perfectly even in the presence of manufacturing mistakes, into the architecture of the circuit.@footnote 2@ An example of such a defect-tolerant computer was built and tested at Hewlett-Packard Laboratories with standard Si technology. The Teramac experimental supercomputer replaced logic with memory whenever possible and relied on sophisticated computer algorithms to identify and route around defects. This architecture is currently being explored as the basis for molecular-electronic memory, logic, signal routing and multiplexing/demultiplexing in a joint research project involving HP Labs (the Quantum Structures Research Initiative), UCLA (the research groups of Profs. J. R. Heath, F. Stoddart and V. Roychowdhury) and UC Berkeley (Prof. Paul McEuen). Experimental results on prototype devices and circuits will be presented and discussed. @FootnoteText@ @footnote 1@ R. P. Feynman, Feynman Lectures on Computation, edited by A. J. G. Hey and R. W. Allen (Addison-Wesley, 1996). @footnote 2@ J. R. Heath, P. J. Kuekes, G. S. Snider and R. S. Williams, "A Defect-Tolerant Computer Architecture: Opportunities for Nanotechnology," Science 280 (1998) 1716.