AVS 46th International Symposium
    Electronic Materials and Processing Division Wednesday Sessions
       Session EM-WeA

Invited Paper EM-WeA5
Fabrication and Manipulation of Silicon Nanocrystals for Non-Volatile Memory Applications@footnote 1@

Wednesday, October 27, 1999, 3:20 pm, Room 608

Session: Novel Materials and Devices for Computation and Communication
Presenter: L.D. Bell, Jet Propulsion Laboratory, California Institute of Technology
Authors: L.D. Bell, Jet Propulsion Laboratory, California Institute of Technology
E.A. Boer, California Institute of Technology
D.H. Santamore, California Institute of Technology
H.A. Atwater, California Institute of Technology
K.J. Vahala, California Institute of Technology
M.L. Ostraat, California Institute of Technology
R.C. Flagan, California Institute of Technology
Correspondent: Click to Email

Silicon-based devices continue to decrease in size, and fast, low-power devices sensitive to small numbers of electrons are now feasible. MOS structures with large arrays of Si nanocrystals can form the basis for a floating gate memory that is extremely fast, reliable and non-volatile, and in which charge stored may be as little as one electron per nanocrystal. To date, these devices have exhibited a distribution of charge transit times during writing of nanocrystal ensembles, which limits speed and array uniformity. This could be related to nanocrystal interface states, a dispersion in oxide thicknesses, or nanocrystal size variations. To address these limitations, we have developed an aerosol vapor synthesis/deposition technique for Si nanocrystals with active size classification, enabling narrow distributions of nanocrystal size. One goal of these experiments was to use atomic force microscopy (AFM) to perform nanocrystal manipulation and charging on a single-particle basis. Si nanocrystal structures (such as lines and arrows) have been formed by contact mode AFM and subsequently imaged in non-contact mode without additional particle motion. Single nanocrystal charging by a conducting AFM tip has been observed, detected as an apparent height change due to electrostatic force followed by a slow relaxation as the charge dissipates. To investigate the charge trapping characteristics of nanocrystals in device structures, we have made samples of Si nanocrystals embedded in thermally grown SiO@sub 2@ films by ion implantation of Si, followed by annealing at 1100°C. A conducting AFM tip has been used to inject charge into these samples and to observe the charge dissipation as a function of time. The relative contributions of surface defects, bulk irradiation damage and nanocrystals to the resultant trapped charge have been studied and have been shown to be dependent on processing parameters. @FootnoteText@ @footnote 1@Research supported by JPL DRDF and NASA.