Pacific Rim Symposium on Surfaces, Coatings and Interfaces (PacSurf 2018)
    Plasma Processing Tuesday Sessions
       Session PS-TuP

Paper PS-TuP5
Fabrication of SnO Thin Films by Reducing Plasma on Atomic Layer Deposited SnO2

Tuesday, December 4, 2018, 4:00 pm, Room Naupaka Salon 1-3

Session: Plasma Processing Poster Session
Presenter: Jaehong PARK, Yonsei University, Republic of Korea
Authors: J.H. PARK, Yonsei University, Republic of Korea
B.E. PARK, Yonsei University, Republic of Korea
H.J. Kim, Yonsei University, Republic of Korea
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Oxide semiconductors have been intensively investigated in emerging applications, such as thin film transistor (TFT), flexible electronics and solar cell materials, owing to the added functionality using great diversity of materials and structures. There have been numerous studies on n-type semiconductors such as ZnO, SnO2, and In2O3, whereas the research on p-type semiconductors is still ongoing due to the lack of synthesis technology. SnO is a representative p-type oxide semiconductor with wide band-gap and high mobility, but the poor stability of SnO limits the synthesis method to physical vapor deposition (PVD). PVD is difficult to apply in future integrated circuit process with aggressive scaling down and 3D structurization. Atomic layer deposition (ALD) is a promising technique owing to atomic-scale thickness controllability and great conformality. In this study, we synthesized p-type SnO thin film using ALD and consequent plasma treatment for reduction. We investigated the crystal structure, morphology, and electrical properties of SnO by using x-ray diffraction (XRD) and atomic force microscope (AFM). In addition, we evaluated the thermal and chemical stability of SnO film. As a result, SnO film shows highly stable SnO phase even after annealing at 400 °C with oxidation/reduction environment. This study will contribute to apply oxide semiconductor in future application by implementing various device structure, such as p-n junction, complementary metal oxide semiconductor(CMOS), and p-channel TFT.