AVS 64th International Symposium & Exhibition
    Nanometer-scale Science and Technology Division Thursday Sessions
       Session NS-ThP

Paper NS-ThP9
Nanolithography Toolbox: Design Solutions for Nanoscale Devices

Thursday, November 2, 2017, 6:30 pm, Room Central Hall

Session: Nanometer-scale Science and Technology Poster Session
Presenter: Roberto De Alba, NIST
Authors: R. De Alba, NIST
K.C. Balram, NIST
D.A. Westly, NIST
M. Davanco, NIST
K.E. Grutter, NIST
Q. Li, NIST
T. Michels, GenISys GmbH
C.H. Ray, NIST
L. Yu, NIST
R.J. Kasica, NIST
C.B. Wallin, NIST
D.A. Czaplewski, Argonne National Laboratory
L.E. Ocola, Argonne National Laboratory
S. Krylov, Tel Aviv University, Israel
P. Neuzil, Brno University of Technology, Czech Republic
K. Srinivasan, NIST
S.M. Stavis, NIST
V.A. Aksyuk, NIST
J.A. Liddle, NIST
B.R. Ilic, NIST
Correspondent: Click to Email

Various lithography patterning technologies can be used to define structures with nanometer-scale lateral dimensions. The first step in any lithographic process consists of device design. There are a number of available design packages that output semiconductor‑standard graphic database system (GDSII) files, which is a binary format representing planar geometric shapes. The predominance of IC devices in manufacturing has led to the development of software packages that are ideal for designing and laying out integrated circuits, which typically have rectilinear geometries, where shape edges are parallel to the x and y axes. Consequently, many of these software packages are not ideal for designing curved geometries with aggressively‑scaled dimensions for nanophotonic, nanoplasmonic, nanofluidic, and nanomechanical devices. To solve this design problem, we have developed a computer‑aided design (CAD) software package for streaming complex shapes to GDSII. The platform-independent Nanolithography Toolbox runs on Linux, Windows and MacOS, and is free for users to download from the Center for Nanoscale Science and Technology at the National Institute of Standards and Technology (CNST) website ( http://www.nist.gov/cnst/ ).

The CNST developed the Toolbox to help users of the CNST NanoFab to design their nanoscale devices, particularly those with curved features and small dimensions. The Toolbox offers design features that are difficult to implement in software optimized for IC design, and allows users to rapidly customize nanoscale shapes of arbitrary complexity. The Nanolithography Toolbox offers hundreds of parameterized shapes that are useful in a variety of applications spanning nanoscale photonics, mechanics, fluidics, electronics, and other disparate fields of scientific endeavor. Furthermore, the Toolbox allows users to precisely define the number of vertices for each shape or to create vectorized shapes using Bezier curves. In the former case, the Toolbox constructs the resulting shapes with a uniform vertex distribution along the periphery, rendering symmetric objects. A shape-rendering parameter controls the number of vertices for vectorized objects. The parameter is set globally for all shapes, or individually for each shape. In the latter case, the resulting rendered shapes have an increased vertex density at higher curvatures. A full description of the all the capabilities of the Toolbox can be found in the manual.