| AVS 64th International Symposium & Exhibition | |
| Electronic Materials and Photonics Division | Monday Sessions |
| Session EM-MoA |
| Session: | Novel Materials and Devices for Electronics |
| Presenter: | Charles Eddy, Jr., U.S. Naval Research Laboratory |
| Authors: | C.R. Eddy, Jr., U.S. Naval Research Laboratory V.D. Wheeler, U.S. Naval Research Laboratory D.I. Shahin, University of Maryland T.J. Anderson, U.S. Naval Research Laboratory M.J. Tadjer, U.S. Naval Research Laboratory A.D. Koehler, U.S. Naval Research Laboratory K.D. Hobart, U.S. Naval Research Laboratory A. Christou, University of Maryland F.J. Kub, U.S. Naval Research Laboratory |
| Correspondent: | Click to Email |
If power switches based on gallium nitride (GaN) transistors are to achieve widespread adoption, then reliable enhancement-mode (normally-off) operation must be demonstrated. The most advanced GaN transistor, the high electron mobility transistor (HEMT), is naturally a depletion-mode (normally-on) device and is finding rapid adoption in RF applications requiring high power and efficiency. To extend these performance benefits to power switches requires fully depleting the two-dimensional electron gas below the gate in absence of a gate bias. This is often achieved by recess etching the AlGaN barrier under the gate. However, to ensure low gate leakage in such a device further requires a reliable gate dielectric on this recessed surface. Here we report on the development and application of ALD deposited ZrO2 gate dielectrics on recessed etched GaN surfaces. First, a thorough investigation of recessed surface pretreatments is conducted. Then, ALD is used to deposit ZrO2 dielectrics on these surfaces using two precursors – zirconium (IV) tertbutoxide and tetrakis(dimethylamino)zirconium. Through careful variations in ALD growth conditions and precursor selection, we demonstrate the ability to achieve a record positive shift in the threshold voltage for a HEMT of up to +3.99V [1] and low gate leakage currents (5 orders of magnitude lower than reference HEMTs) under on-state conditions (Vgs= +10V and Vds= +20V). These promising early results have been followed by studies of traps in these device structures using a previously established method [2]. Details of recessed surface preparation and trap behavior will be presented.
[1] T.J. Anderson et al., Appl. Phys. Express 9, 071003 (2016).
[2] J. Joh and J. A. del Alamo, IEEE Trans. Electron. Dev. 58, 132 (2011).