Invited Paper EM1-WeM5
Disorder Induced Gap States in III-V MOS Devices

Wednesday, October 30, 2013, 9:20 am, Room 101 B

Frequency dispersion is a commonly observed feature in the experimental capacitance-voltage characteristics of III-V MOS devices. This characteristic has been reported on a wide variety of III-V substrates in conjunction with many different dielectrics. The conventional interface state capacitance model, which works extremely well for Si devices, does not accurately model the frequency dispersion observed in III-V systems. Different models have been developed to explain the origin of this frequency dispersion. One model, disorder induced gap states (DIGS), attributes this dispersion to the tunneling of carriers into a disordered region caused by oxidation of the III-V substrate which is close to the interface between the III-V substrate and an insulator. A separate model attributes this dispersion to border traps located inside and associated with the high-k dielectric. In this talk, electrical characterization, modeling and physical characterization is used to demonstrate that the observed frequency dispersion must be due to the disruption of the crystalline III-V semiconductor during oxide deposition and not due to border traps located in the high-k dielectric.