| AVS 60th International Symposium and Exhibition | |
| Electronic Materials and Processing | Tuesday Sessions |
| Session EM+PS-TuM |
| Session: | High-k Oxides for MOSFETs and Memory Devices I |
| Presenter: | T.H. Hou, National Chiao Tung University, Taiwan, Republic of China |
| Authors: | T.H. Hou, National Chiao Tung University, Taiwan, Republic of China C.W. Hsu, National Chiao Tung University, Taiwan, Republic of China I.T. Wang, National Chiao Tung University, Taiwan, Republic of China |
| Correspondent: | Click to Email |
Crossbar resistive-switching random access memory (RRAM) with a minimum cell size of 4F2 has attracted much attention recently because of its superior memory performance, ultrahigh density, and ultimate scaling potential. The most anticipating emerging application of RRAM in future high-speed information systems is the storage-class memory (SCM) aiming to revolutionize inefficient data-storage hierarchy based on hard disks and present memory technologies. The requirements of the SCM technology include high data bandwidth, large storage capability, and low bit cost.
Replacing the current 2D memory with 3D memory architecture is one of the most feasible options to further increase storage capability per unit area. The types of 3D memory architectures can be divided into the 3D stacking of horizontal memory arrays and the bit-cost scalable (BiCS) 3D vertical memory. In the first part of this paper, two crossbar RRAM architectures, namely one diode-one resistor (1D1R) and one selector-one resistor (1S1R) fabricated using low process temperature applicable to the 3D stacking of horizontal memory arrays, are discussed. Their high-bandwidth parallel read/write capabilities are also investigated.
Despite the increase of bit density, the formation of multiple horizontal memory arrays requires a larger number of photolithography steps, and thus is unable to reduce bit cost. By contrast, multiple layers of thin film deposition and a small number of photolithography steps are used to produce high-density 3D vertical RRAM arrays potentially at extremely low cost. Stacking two individual selection and memory devices as a 1D1R or 1S1R cell is extremely challenging in 3D vertical RRAM arrays because the metal electrodes between two devices cannot be easily patterned at the vertical sidewall. Therefore, it is of great interest to develop a nonlinear RRAM device requiring no external selection device. In the second part of this paper, the latest advance of self-rectifying devices compatible to 3D vertical RRAM arrays are reviewed.