| AVS 58th Annual International Symposium and Exhibition | |
| Electronic Materials and Processing Division | Thursday Sessions |
| Session EM-ThP |
| Session: | Electronic Materials and Processing Poster Session |
| Presenter: | Lucas P.B. Lima, State University of Campinas, Brazil |
| Authors: | L.P.B. Lima, State University of Campinas, Brazil J.A. Diniz, State University of Campinas, Brazil C. Radtke, Federal University of Rio Grande do Sul, Brazil I. Doi, State University of Campinas, Brazil J. Miyoshi, State University of Campinas, Brazil A.R. Silva, State University of Campinas, Brazil J. Godoy Fo, State University of Campinas, Brazil |
| Correspondent: | Click to Email |
Tantalum nitride (TaN) films have been obtained by DC sputtering deposition in a nitrogen/argon ambient on Si substrates. TaN film have been used as gate electrodes in MOS capacitors and in Schoktty diodes on Si substrates. 20nm and 100nm thick TaN layers were deposited by DC sputtering in N2:Ar (20:60 sccm) ambient, with a sputtering power of 1000 W. These films presented electrical resistivity of 327 Ω.cm and poly crystalline strucure. XPS analysis evidence TaN and Ta2O5 formation in both 20 nm (Fig. 1) and 100 nm (Fig. 2) thick films. Ta2O5 formation could be related with the exposure the metal electrode to air. To get MOS capacitors with TaN/SiO2/Si/Al and Al/TaN/SiO2/Si/Al structures, the Si substrates were used and were cleaned with a standard RCA method. After, dry thermal oxidation at 1000°C for 2 min was carried out and a 8 nm thick SiO2 layer on Si was obtained. 20 nm and 100nm thick TaN layer was deposited on SiO2/Si by DC sputtering. Finally, in some devices a 200nm thick alumininum (Al) layer was deposited on TaN layer by DC sputtering, in order to reduce these contamination of the metal electrode. MOS capacitor pattern was defined by a mask composed of an array of 200 µm diameter dots. These devices were sintered in conventional furnace in forming gas at 450 °C for 30 minutes and were electrical characterized by capacitance-voltage (C-V) measurements. Figure 3 and 4 presents MOS capacitor C-V characteristics. TaN work function values and flat-band voltage were extracted from all C-V measurements using CVC software and 1/C2 method. The extracted TaN work function values and flat-band voltage were between 4.3 and 4.4 eV (Fig. 3-4), 0.1 and 0.2 V (Fig. 3-4), respectively. The variations on work function values are related with the dipole variations due the interface between metal and dielectric. To investigate the TaN work function, Schoktty diodes were fabricated in the same substrate of MOS capacitors. TaN layer were deposited by DC sputtering in a N2:Ar (20:60 sccm) ambient, with a sputtering power of 1000 W. TaN/Si/Al and Al/TaN/Si/Al diodes were formed with TaN (20nm and 100nm) gate electrodes and Al layer (200nm) were deposited by DC sputtering process. These diodes were sintered in conventional furnace in forming gas at 450 °C for 30 minutes. The electrodes were patterned with a mask composed of an array of 200 µm diameter dots. These diodes were electrical characterized by current-voltage (I-V) measurements, and the ideality factor between 1.1 and 1.5, and work function values between 4.4 and 4.5 eV were extracted, which is near the work function values for mid-gap electrode application.