| AVS 58th Annual International Symposium and Exhibition | |
| Electronic Materials and Processing Division | Thursday Sessions |
| Session EM-ThP |
| Session: | Electronic Materials and Processing Poster Session |
| Presenter: | Israel Mejia, University of Texas at Dallas |
| Authors: | J.I. Mejia, University of Texas at Dallas A. Salas-Villasenor, University of Texas at Dallas A. Carrillo-Castillo, University of Texas at Dallas B.E. Gnade, University of Texas at Dallas M.A. Quevedo-Lopez, University of Texas at Dallas |
| Correspondent: | Click to Email |
In recent years, the development of novel processes for inexpensive and flexible electronics has become an increasing research area where low-cost and low temperature deposition techniques are key point to fabricate large area and flexible circuits. Here, we demonstrate fully photolithography defined thin film transistors using cadmium sulfide (CdS) and lead sulfide (PbS) as n-type and p-type semiconductors, respectively. These chalcogenides materials are deposited using chemical bath deposition (CBD) which is a low cost solution-based process that requires temperatures below 70° C. Extracted mobility for CdS was 25 cm2/V-s and 0.14 cm2/V-s for PbS. These mobilities are among the highest reported for a fully patterned TFT made with either CdS or PbS as semiconductor. The maximum temperature used in the complete fabrication process was kept below 100° C. In addition, we studied how the device performance (mobility, threshold voltage and contact resistance) is affected depending on the semiconductor thickness, thermal annealing and the metal used as drain-source electrodes. Our fabrication approach can be integrated in complex designs such as CMOS logic gates, pixel arrays, etc., complying with all the requirements for a flexible electronics technology.