Si etch process for etching deep and high-aspect ratio structures has been studied intensely for applications such as DRAM trench capacitors and MEMS devices. Recently, there is focus on Si etching for TSV (through Si via) applications for 3-D (three-dimensional) LSIs. Dimensions of the TSVs which are being investigated today vary widely, depending on its application and integration scheme. For example, TSV for 3-D packaging of logic devices may be sub-micron to a few microns in diameter and about 10 microns deep. On the other hand, TSVs used in stacking memory devices, the via diameter and depth would be several tens of microns, and, package for CMOS image sensors using TSVs may have via diameters and depths up to 100 microns.

For TSVs up to 10 microns in depth, the conventional Si deep trench etch process for DRAMs can be easily adapted to etching TSVs because of its similar dimensions. The typical etch rate is several microns per minute. On the contrary, etching of very deep holes of depths on the order of tens of microns and up to 100 microns is not within the experience of conventional front-end LSI fabrication processes. In this case, consequently, an extremely high Si etch rate becomes mandatory because of cost issues, especially for TSV applications which require via holes more than 20 microns deep.

To fulfill this requirement for TSV applications, the Si etch process was investigated focusing on the Si etch rate. First, a large via size of 40 microns was studied, and an etch rate of more than 50 µm/min was realized. It was found that the Si etch rate depended on fluorine radical density, so, high rate was obtained by creating a high fluorine radical density condition by using a high pressure condition of 350 mTorr, with a capacitively-coupled plasma (CCP) reactor with a Dipole-Ring Magnet (DRM) and SF₆ gas chemistry. Furthermore, the etch process for smaller holes of 8 microns was studied to realize high etch rates also. The etch process was modified to obtain a straight etch profile, then, via holes were etched to a depth of 60 microns at an etch rate of 24 µm/min.

High rate deep Si etching is realized for TSV application for holes more than 20 microns deep, using CCP RIE with SF₆–based gas chemistry.