AVS 56th International Symposium & Exhibition
    Nanometer-scale Science and Technology Wednesday Sessions
       Session NS-WeM

Paper NS-WeM12
Towards Wafer-Scale Fabrication of Room-Temperature Single-Electron Transistors

Wednesday, November 11, 2009, 11:40 am, Room L

Session: Nanoscale Devices and Sensors and Welch Award
Presenter: S.J. Koh, University of Texas at Arlington
Authors: P. Bhadrachalam, University of Texas at Arlington
V. Ray, University of Texas at Arlington
R. Subramanian, University of Texas at Arlington
S.J. Koh, University of Texas at Arlington
Correspondent: Click to Email

We recently demonstrated CMOS-compatible fabrication of single-electron transistors (SETs) that operate at room temperature (Nature Nanotech. V.3, p.603, 2008). This was realized using a new device architecture in which source and drain electrodes are vertically separated with a Coulomb island placed between the electrodes. Here, we present two important advancements toward wafer-scale fabrication of room-temperature SETs for practical applications. Firstly, we present a technique for placing Coulomb islands between the source and the drain electrodes with nanoscale precision, which significantly improves the yield of device fabrication. This accurate placement was made possible by electrostatically guiding Coulomb islands onto the center of the electrode gap. The electrostatic guiding structures were made on a large scale using self-assembled monolayers (SAMs) of positively- and negatively- charged molecules. Secondly, we present a very small fluctuation of the background charges for our fabricated SETs. The uncontrolled fluctuation of background charges has been one of the major obstacles to the practical implementation of SET devices. The shift of background charges was directly measured from the phase shift of Coulomb oscillations at room temperature and it was found that the charge shift was only ~0.01e (e: electron charge) over a time span of more than a week. These two advancements show a great promise for realization of integrated systems of room-temperature SETs for practical use. (Supported by NSF CAREER (ECS-0449958), ONR (N00014-05-1-0030), THECB (003656-0014-2006))