The scaling behaviors of silicon nitride, as charge trapping layer in embedded nonvolatile (poly) silicon-oxide-nitride-oxide-silicon (SONOS) flash memory application is presented. The conventional SONOS structure shows not only electron back-tunneling and charge retention loss problem, but also similar non-trapping behaviors at 5 nm silicon nitride thickness in our previous work. Therefore, we adopted an ultra thin oxide-nitride-oxide (ONO) barrier to replace the single tunnel oxide in the conventional structure and achieved enhanced memory characteristics. In this paper, we continuously investigate the limitation of scaling behaviors of silicon nitride for bandgap engineered charge trapping memory, according to dimension scaling down tendency in memory cells. The bandgap engineered device consists of multi-layer structure of oxide-nitride-oxide-nitride-oxide, which is fabricated by low pressure chemical vapor deposition (LPCVD). Memory characteristics, such as program/erase speed, and charge retention are characterized by Quasi-steady static C-V observation by Agilent 4156C and Agilent 41501B. Detected memory windows (△V_FB), which is defined as the change of flat band voltage from programmed state to erased state, are 3.32 V, 3.73 V, and 4.05 V, when Fowler-Nordheim (F-N) stresses is applied in 5 nm thickness of silicon nitride at -13 V, -12 V, and -11 V, respectively. These experimental data shows excellent memory operation behaviors, and indicates further scalability of charge trapping layer compared to the conventional structures. Device reliability issue is also evaluated by charge retention measurement. Experimental data demonstrates that device embodies excellent reliable memory operation.