AVS 55th International Symposium & Exhibition
    Biomaterial Interfaces Thursday Sessions
       Session BI-ThP

Paper BI-ThP9
Investigation and Reduction of Current Noise in Solid-State Nanopores

Thursday, October 23, 2008, 6:00 pm, Room Hall D

Session: Biomaterial Interfaces Poster Session with Focus on Engineered Bio-Interfaces and Sensors
Presenter: D. Pedone, Technical University Munich, Germany
Authors: D. Pedone, Technical University Munich, Germany
M. Firnkes, Technical University Munich, Germany
G. Abstreiter, Technical University Munich, Germany
U. Rant, Technical University Munich, Germany
Correspondent: Click to Email

Solid state nanopores have emerged as powerful analytical tools to study single molecules. DNA translocation experiments have been conducted with great success in the past, and protein translocation has been demonstrated recently. In these experiments, the biomolecule is detected by measuring the ionic current through the pore, which becomes transiently suppressed when a molecule traverses the pore. The use of solid-state nanopores for studies of complex biomolecular behavior or interactions relies on the ability to record these current blockades with superior fidelity, which poses great challenges with respect to the noise characteristics of the solid-state device. Here we present systematic studies addressing the current noise of solid-state nanopores for translocation experiments. Pores with diameters <10 nm have been fabricated in Si3N4 membranes by e-beam lithography and subsequent shrinking in a transmission electron microscope. The electrical characteristics of the nanopore chips in aqueous pH-buffered saline solutions are studied using electrochemical impedance spectroscopy (EIS), cyclic voltammetry, and potential step methods. Equivalent circuit models to represent the nanopore device are proposed based on the obtained data. The frequency dependence of the current noise is recorded with spectral analyzers and discussed within the extracted equivalent circuit models. Within this framework, we investigate the influence of various parameters on the electrical noise: (i) chip designs with different membrane dimensions are realized by combining optical and e-beam lithography with feedback-etching methods, (ii) surface passivation using silicone elastomers and photo-resists are compared, (iii) the composition, salinity, and pH value of the buffer solution is examined. Our results allow us to identify the contribution of various capacitances and dielectric losses across the chip to the measurement noise and suggest guidelines for low-noise translocation recordings.