| AVS 54th International Symposium | |
| Thin Film | Friday Sessions |
| Session TF2-FrM |
| Session: | Nanoparticles |
| Presenter: | J. Park, The University of Tennessee |
| Authors: | J. Park, The University of Tennessee S.Y. Kwon, The University of Tennessee S.-I. Jun, dpiX A.V. Melechko, Oak Ridge National Laboratory T.E. McKnight, Oak Ridge National Laboratory M.L. Simpson, Oak Ridge National Laboratory P.D. Rack, The University of Tennessee |
| Correspondent: | Click to Email |
Thin film transistors (TFT) with vertically aligned carbon nanofibers (VACNF) are an attractive electronic switching device for nanoscale electroanalysis and delivering biological material into live cells. In our previous work, we have demonstrated an amorphous silicon TFT array integrated with VACNFs for delivering biological material into live cells. To enhance the device performance, we have explored a polycrystalline silicon active layer with a bottom-gate structure. For the poly silicon device, source/drain and gate metals and gate dielectric thin films were RF magnetron sputter deposited. We have examined several enhanced crystallization strategies including DC bias stress during amorphous silicon deposition and stress induced crystallization (SIC) using dielectric silicon nitride caps with relatively lower process temperature and higher crystallinity silicon than conventional annealing. The silicon films have been characterized by x-ray diffraction, scanning electron microscopy, and Raman spectroscopy. In this presentation, we will demonstrate the process flow of fabricating polycrystalline silicon with the stress effects and the characteristics of polycrystalline silicon will be discussed. Furthermore, the electrical characteristics of the TFTs with this active layer will be demonstrated.