| AVS 54th International Symposium | |
| Thin Film | Tuesday Sessions |
| Session TF-TuP |
| Session: | Aspects of Thin Films Poster Session |
| Presenter: | S.-H. Shin, Chosun Univ., Korea |
| Authors: | S.-H. Shin, Chosun Univ., Korea P.-G. Jung, Chosun Univ., Korea Y.-K. Jun, Chosun Univ., Korea P.-J. Ko, Chosun Univ., Korea N.-H. Kim, Sungkyunkwan Univ., Korea W.-S. Lee, Chosun Univ., Korea |
| Correspondent: | Click to Email |
Metal-ferroelectric-insulator-silicon field-effect-transistors (MFISFETs) have attracted much attention as promising non-volatile memory devices due to their nondestructive read operation possible. Both the ferroelectric and insulator materials are generally known not to be etched well with plasma etching system. Plasma damage on sloped sidewall of the ferroelectric materials and integration problem by the sloped sidewall were also reported in plasma etching process. In this study, BLT/CeO2/silicon structure was fabricated by damascene process of chemical mechanical polishing (CMP) with one-step polishing process. The process parameters of CMP were optimized for one-step CMP process for BLT/CeO2 films. This novel method to fabricate the MFIS structure could reduce the many process steps. Vertical sidewall of the BLT/CeO2 structure was also obtained, which led to densify the devices without the plasma damage. The C-V and I-V characteristics of the BLT/CeO2/Si structures were measured for MFISFET devices. Acknowledgement: This work was supported by a Korea Research Foundation grant (KRF-2006-005-J00902).