AVS 51st International Symposium
    Thin Films Monday Sessions
       Session TF-MoM

Paper TF-MoM5
Nucleation and Electrical Characterization of Ruthenium formed by Selective Area Atomic Layer Deposition

Monday, November 15, 2004, 9:40 am, Room 303C

Session: ALD and Applications
Presenter: K.J. Park, North Carolina State University
Authors: K.J. Park, North Carolina State University
J.M. Doub, North Carolina State University
G.N. Parsons, North Carolina State University
Correspondent: Click to Email
Ruthenium is a promising candidate for advanced metal gate electrodes in complementary metal-oxide-semiconductor (CMOS) transistors because of its thermal stability and low resistivity. Ru metal films were deposited by Atomic Layer Deposition (ALD) in a flow tube reactor system using Ruthenocene with oxygen as a reducing reactant on hydrogen terminated silicon, silicon oxide, HfO@sub 2@, as well as patterned organic monolayer surfaces at temperatures ranging from 300 to 375°C. Films were characterized by Auger electron spectroscopy, atomic force microscopy, and capacitance voltage analysis. Self limiting ALD behavior with ~1Å/deposition cycle was observed between ~315 and 350°C at 1.2 Torr operating pressure. At higher temperatures, growth rate per cycle increased indicating the onset of CVD growth conditions. No growth was observed at 300°C on any surface indicating no precursor adsorption, consistent with previous studies of the ruthenocene/oxygen ALD process. The incubation time for deposition was strongly dependent on the substrate. Growth initiated quickly on chemical oxide whereas >100 cycles were required for growth on Si-H surfaces and methyl terminated organic monolayers. The difference in nucleation allowed for selective area deposition of Ru on micron-scale pre-patterned surfaces, where >300Å of growth proceeded on oxide, with no visible deposition on the organic monolayer. Capacitor structures were formed by selective Ru deposition and characterized electrically using various thicknesses of dielectric films. Fitting the flatband voltage vs thickness results in an effective workfunction of 4.8eV on SiO@sub 2@, indicating that selective area deposition may be useful for integration of multiple metals into dual-metal gate CMOS structures. Possible mechanisms associated with nucleation and substrate dependence will be discussed.