AVS 51st International Symposium
    Plasma Science and Technology Friday Sessions
       Session PS1+DI-FrM

Paper PS1+DI-FrM5
Investigation of Etching Properties of HfSiO and HfSiON as Gate Dielectrics

Friday, November 19, 2004, 9:40 am, Room 213A

Session: High K and Difficult Materials Etch
Presenter: J.H. Chen, National University of Singapore
Authors: J.H. Chen, National University of Singapore
W.S. Hwang, National University of Singapore
W.J. Yoo, National University of Singapore
S.H.D. Chan, National University of Singapore
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Hf based high-K dielectrics have been studied as the alternative gate dielectric. For the high performance logic device application, HfSiON is receiving significant attention as the most promising dielectric material because of its good thermal stability, immunity to boron penetration and high carrier mobility in the channel under the gate. In advanced HfSiON films, N profile is optimized: the top HfSiON is highly nitrided to block boron penetration, but the bottom near Si substrate remains as HfSiO to maintain high carrier mobility in the channel. We investigated the etching properties of Hf@sub x@Si@sub 1-x@O@sub 2@ (x=0, 0.3, 0.5, 0.7 and 1) and their nitrided films in ICP of Cl@sub 2@/HBr/O@sub 2@. Results show that etch rates of HfSiO and HfSiON increase rapidly with increasing ion energy, ion density and ratio of Cl@sub 2@. Linear dependency of etch rates on the @sr@E@sub ion@, which obeys the universal energy dependency model of ion enhanced chemical etching yields, was observed with the etch threshold energies of 30-36 eV for HfSiO with different Si% in Cl@sub 2@/HBr. Etch rates of HfSiO and HfSiON are strongly dependent on the open area of the wafer because the oxygen released from these films can suppress the etching process. The addition of the small amount of O@sub 2@ to Cl@sub 2@/HBr plasma or increasing pressure can suppress the etching of HfSiO and HfSiON effectively. The 6nm thick HfSiO or HfSiON can be removed by a wet chemical of 1% HF (DHF) in 30s before anneal; after 700@super o@C anneal, etch rates drop slightly but the densified HfSiO interfacial layer (IL) of ~1nm cannot be removed in DHF. By incorporating N by the plasma nitridation, this IL can be removed by DHF in 10s, and very little Si substrate recess and clean surface can be achieved. This combined approach of the plasma etching and the wet removal proved that HfSiON can be integrated into advanced CMOS processes successfully.