AVS 51st International Symposium
    Plasma Science and Technology Monday Sessions
       Session PS-MoP

Paper PS-MoP30
Self-Aligned Contact Etch Development for 90nm Technology Node

Monday, November 15, 2004, 5:00 pm, Room Exhibit Hall B

Session: Poster Session
Presenter: M.G. Sedigh, Cypress Semiconductor
Authors: M.G. Sedigh, Cypress Semiconductor
H. Lee, Cypress Semiconductor
J. Zhang, Cypress Semiconductor
J. Stinnett, Applied Materials, Inc.
A. Joshi, Applied Materials, Inc.
Correspondent: Click to Email
Self-aligned contacts play a significant role in driving down the cell size in CMOS-based memories, in particular DRAM and SRAM. We present development results of self-aligned contact etch for SRAM 90 nm technology node. Requiring high SiO@sub 2@, Si@sub 3@N@sub 4@, P.R. selectivity and vertical profile, combined with constrained imposed on the process by using 193 nm P.R. and organic BARC (required for improving lithography process window) and ever-present need for well-formed big structures in open area (i.e. overlay measurement marks) form the boundary of our development efforts. Summary of development effort starting from early stage (tool selection, chemistry selection, CIP etc.) and resolving specific failure modes (striation, CD bias, reverse microloading, etc.) will be presented. Some shortcomings and deficiencies with current tool/architecture followed by our recommendation for eliminating them toward next generation dielectric etch will be also discussed.