AVS 51st International Symposium
    Manufacturing Science and Technology Tuesday Sessions
       Session MS-TuP

Paper MS-TuP6
Integration of an Ultra Low-k Dielectric in a 300mm 130nm Trench First Dual Damascene Etch Process

Tuesday, November 16, 2004, 4:00 pm, Room Exhibit Hall B

Session: Poster Session
Presenter: R. McGowan, International Sematech
Authors: R. McGowan, International Sematech
P.J. Wolf, International Sematech
D. Wang, Tokyo Electron America, Inc.
Correspondent: Click to Email
This paper describes a two level metal, 130nm dual damascene etch process development, using an ultra low-k (ULK) dielectric material (k=2.2) on 300mm wafers. The process used a dual hardmask approach in a "Trench First" etch scheme with an interlayer etch stop. Each step requires good uniformity and selectivity to the underlying layers. A BARC etch DOE (used in all recipes) and correct selection of the hardmask & barrier etch chemistries were key factors in the successful etch development. Three iterations, in an overall cycle of improvement, are given as examples, used to take the process from an initial low yield to a robust high yielding process.