AVS 51st International Symposium
    Manufacturing Science and Technology Tuesday Sessions
       Session MS-TuP

Paper MS-TuP5
Hard Mask Dual Damascene Integration Scheme for 65nm

Tuesday, November 16, 2004, 4:00 pm, Room Exhibit Hall B

Session: Poster Session
Presenter: G.A. Delgadino, Applied Materials, Inc.
Authors: G.A. Delgadino, Applied Materials, Inc.
T.P. Pender, Applied Materials, Inc.
M. Le, Applied Materials, Inc.
S. Li, Applied Materials, Inc.
L.Q. Xia, Applied Materials, Inc.
Y. Ye, Applied Materials, Inc.
Correspondent: Click to Email
Smaller geometries and the use of lower κ dielectrics in BEOL integration at 65nm and beyond will require extensive changes in dual damascene integration scheme. Traditional via-first approach reaches its limits as 248nm photoresist is replaced by thinner, weaker, poisoning-prone 193nm photoresist. In this paper presents the development of a hard mask integration solution for extending the implementation of copper/low-κ interconnect structures at 65nm node and beyond. The scheme overcomes major challenges in low-κ integration, minimizing ashing damage to low-κ material and avoiding photoresist poisoning issues associated with 193nm resist. Two Hard mask materials, TiN and W were investigated and potential problems addressed. For the etching point of view, both materials showed good performance but TiN required more tradeoffs due to its lower sputtering resistance and more chemically reactive nature. On the other hand, TiN transparency in part of the visible spectrum, facilitate integration while W required modifications during deposition and/or limitations on the mask thickness. Preliminary Low shear-force CMP with different slurries demonstrated good removal rates for both materials. From the perspective of feasibility and cost, hard mask Dual Damascene appears to be a promising candidate for competitive Copper/Low k integration.