AVS 51st International Symposium
    Magnetic Interfaces and Nanostructures Tuesday Sessions
       Session MI-TuP

Paper MI-TuP9
Undercut Nano Contact-hole Fabrication for a Ferromagnetic Vertical Single Electon Transistor and TMR Enhancement in the Coulomb Blockade Regime

Tuesday, November 16, 2004, 4:00 pm, Room Exhibit Hall B

Session: Poster Session
Presenter: S. Haraichi, National Institute of Advanced Industrial Science and Technology, Japan
Authors: S. Haraichi, National Institute of Advanced Industrial Science and Technology, Japan
T. Wada, National Institute of Advanced Industrial Science and Technology, Japan
Correspondent: Click to Email
Recently, we have fabricated ferromagnetic single electron transistor s (FSET) with nanometer sized vertical magnetic tunnel junctions and observe d a strong TMR enhancement in the Coulomb blockade regime at relatively high temperature. The FSET consists of under layer drain electrodes, interlayer insulating layer with nano contact-holes, and over layer source electrodes, which is fabricated on an SOI substrate whose cap silicon layer acts as the gate electrode. The key issue of the process is the fabrication of undercut nano contact-holes. We use the bilayer SiO@sub 2@ of high-temperature sputte r layer and low-temperature sputter layer as an interlayer insulating layer. By using the etching rate dependence on sputtering temperature of SiO@sub 2@ in the electron beam direct lithography process, undercut nano contact-hol es have been successfully fabricated with a minimum diameter of 17 nm. Final ly, we have fabricated a vertical crossbar type FSET and obtained over 100% TMR enhancement at 15 K. This TMR enhancement can be modulated by the gate voltage.