AVS 51st International Symposium
    Dielectrics Monday Sessions
       Session DI-MoP

Paper DI-MoP5
The Physical and Electrical Characteristics of p@super+@-Polycrystalline-Si and Si@sub1-x@Ge@subx@(x=0.27)/High-k Gate Dielectric (AlN and Al@sub2@O@sub3@) Films

Monday, November 15, 2004, 5:00 pm, Room Exhibit Hall B

Session: Poster Session
Presenter: C. Lee, Seoul National University, Korea
Authors: C. Lee, Seoul National University, Korea
J.Y. Park, Seoul National University, Korea
C.H. Hwang, Seoul National University, Korea
H.J. Kim, Seoul National University, Korea
Correspondent: email address not available
The polycrystalline (poly) Si@sub1-x@Ge@subx@(x=0.27) gate has been also investigated as a substitute of poly-Si gate, which seems not to be suitable for new high-k dielectrics and gives rise to troubles due to poly-depletion effect (PDE) and boron penetration. We investigated the compatibility between the poly-Si@sub0.73@Ge@sub0.27@ gate and high-k gate dielectrics in terms of the boron and germanium diffusion behaviors and electrical characteristics of stack structures, which were prepared with or without a capping or bottom AlN layer on high-k Al@sub2@O@sub3@ of MOS capacitors. The metal-oxide-semiconductor (MOS) capacitors characterized in this experiment include various high-k gate dielectric stacks such as p@super+@-poly-Si gate/ Al@sub2@O@sub3@/n-type Si, p@super+@-poly-Si@sub0.73@Ge@sub0.27@ gate/Al@sub2@O@sub3@, AlN- Al@sub2@O@sub3@, or AlN-Al@sub2@O@sub3@-AlN/n-type Si. High-k dielectrics like Al@sub2@O@sub3@ and AlN films were deposited on n-type Si (100) wafers with a resistivity of 4~8 @ohm@cm by atomic layer deposition (ALD) technique using Al(CH@sub3@)@sub3@, O@sub3@, and NH@sub3@ at 400°C after RCA SC1 and diluted HF cleaning. The physical thickness of the AlN films was controlled very thin (~ 0.5 nm). Post deposition annealing (PDA) of the samples was performed with rapid thermal annealing (RTA) at 800°C in N@sub2@ for 30 seconds. Post-metallization annealing (PMA) was performed at 400°C for 30 min under a 5% H@sub2@ + 95% N@sub2@ atmosphere. Capacitance equivalent thickness (CET) decreased by approximately 30 % for the p@super+@-poly-Si@sub0.73@Ge@sub0.27@ gate compared to the p@super+@-poly-Si gate with the Al@sub2@O@sub3@ films at the same physical thickness, which resulted from the improved PDE. Leakage current density of MOS capacitors with AlN barrier layers shows a lower value compared to that of the single Al@sub2@O@sub3@ film due to the enhanced boron blocking properties.