Endorsed by APS and its Forum on Industrial & Applied Physics (FIAP)

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Sessions & Descriptions

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Schedule

Abstract Submission
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 Extended Deadline: February 20, 2006
 

Session Summaries and Invited Speakers

Designs and Materials for Alternative Charge or Magnetic Moment-Based Devices

Session Committee: *A. Diebold, A. Muscat, L. Larson
The semiconductor industry is investigating the device technology beyond Planar CMOS and non-planar extensions. A great number of approaches are being explored. These include molecular electronics, magnetic materials-based spintronics, devices using ballistic carrier transport, devices based on quantum effects, and single electron transistors. The first applications of these new approaches will not be replacements for existing memory or logic. Molecular electronic based sensors can be commercialized quickly because of the lack of alternate solutions for detection. Many of the alternative charge transfer devices use more traditional materials. One example is the single electron transistors which is being explored in many research laboratories. It is important to note that devices based on magnetic moments are already being commercialized. Magnetoresistive random access memory (MRAM) are fabricated using new materials and traditional fabrication processes. Thus, MRAM can be manufactured in silicon FABs. MRAM is especially interesting because of its high density and non-volatility. Papers in any area of alternative charge transfer devices may be submitted to this session.

Stress Engineering in Transistor Channels and Thin Films

Session Committee: *S. Zollner, A. Diebold, L. He, L. Zhang
To improve performance, future transistors need higher drive currents and reduced stage delays, which requires a channel with higher mobility than bulk Si. This can be achieved with uniformly stressed substrates (for example, using strained epilayers) or process-induced strain (e.g., silicon-germanium source-drain stressors, raised source-drains, device isolation-induced strain, or stressed interlayer dielectrics), modifying the orientation of current transport, or with enhanced-mobility materials, such as Ge, group-IV alloys, or III/V compound semiconductors. This session will combine science, engineering, and technology papers (experiment, theory, processing, and devices) on all of the above-mentioned topics, plus general issues of stress and other mechanical properties in microelectronics. We also encourage submission of abstracts on the measurement of strained layers and microstructures, such as UV Raman spectroscopy or high-resolution x-ray or electron diffraction.

Gate Stack and Junction Engineering

Session Committee:*M. Frank, A. Muscat, J. Hillman, L. Larson
This session addresses progress in planar transistor performance employing new materials and doping schemes. Focus is on advanced concepts such as novel gate stack materials, high-mobility substrates, and ultra-shallow junctions. Of particular interest are contributions concentrating on (a) fundamental understanding of materials and interface properties that affect device functionality (e.g. the atomic-scale nature of defects in high-k dielectrics); (b) processing and integration schemes and their impact on stack/junction properties (e.g. on the effective work function of metal gates); and (c) breakthrough device performance utilizing new materials/junctions. Topics include, but are not limited to:

  • Novel gate stack: High-k dielectrics (Hf-based and beyond), FUSI, metal gates

  • High mobility substrates: Strained Si, SiGe, Ge, GaAs, InSb

  • Ultra-shallow junctions

  • Advanced physical and electrical characterization

  • Theoretical modeling of atomic and electronic structure and of  device performance

Contact and Interconnect Stack Engineering

Session Committee: *D. Frye, J. Hillman, S. Zollner, S. Satyanarayana, L. He, J. Givens, D. Louis, L. Zhang
This session addresses current and future materials, reliability, and processing challenges in the contact and interconnect stack. Examples of these challenges include: current and future Salicides and Silicides, Contact and BEOL Integration, Hybrid and Homogenous BEOL Dielectric Stacks, Pore Sealing, New Low K Hardmasks, Metal Barriers, Metrology related to the contact and interconnect layers, New interconnect schemes including Nano-wire, Air Gaps, Carbon nano-tubes and Optical interconnect.  We also encourage submission of abstracts covering issues for future device structures, such as MRAM, FeRAM, and MEMS. Mechanical Properties, Reliability and Electromigration of the Contact and BEOL is of interest.

Formation, Patterning and Characterization of Films & Interfaces

 Session Committee: *T. Chowdhury, M. Goeckner, M. Frank, D. Frye
This session addresses all aspects of formation, patterning and characterization of films and interfaces.  Topics of interest include, but are not limited to: Current & future trends & challenges in lithography (Line edge Roughness, Immersion vs Imprints,157 nm vs EUV, Multi layer Patterning solutions), CD Control, Patterning/ Integration Challenges for Low K films for BEOL, Surface treatment of films, Damage & annealing of films, Dielectric etch and Deposition including Growth, Nucleation, and Defects.  Abstracts covering fundamental novel films and polymers, such as self-assembly and carbon nanotubes are encourages.

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